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For Ayar Labs, the company best known for fiber-to-chip interconnects, the industry-wide adoption of chiplets couldn’t have come at a better time. These silicon and packaging technologies enable Ayar’s silicon photonic chiplets, which convert from the electrical domain to the optical domain for chip-to-chip communication, to bypass the bandwidth bottlenecks of copper links, reduce power and latency, and extend range.

“It’s nice to be lucky,” Ayar Labs CEO Charlie Wuishpard said with a laugh during an exclusive interview with EE Times at Ayar’s headquarters in Santa Clara, California.

“I wouldn’t say we predicted [chiplets], but it certainly provides a landing zone for the technology,” he said. “If it wasn’t for the chiplet, we would have made the argument to try to embed that set of IP either in the silicon or perhaps as a standalone module on the outside, either of which would have its own additional challenges.”

Ayar Labs chips sit next to the CPU die on the same interposer, allowing optical communication with other chips in the system (Source: Ayar Labs)

Chiplets offer the ability to develop specialized functions for different process technologies, which are then packaged together in a silicon intermediate in a tightly integrated manner. This means that Ayar’s TeraPHY silicon photonics die, which uses GlobalFoundries’ 45-nm process, can be co-packaged with a customer’s large processor die, which may be on a cutting-edge 7-nm process (or lower). .

Instead of integrating Ayar’s entire TeraPHY chiplet into a processor die, in the future Ayar may license its electrical blocks or subblocks to customers to put them into processor chiplets as an alternative to developing custom solutions, Wuischpard said. The more likely scenario would be to further split the optical and electrical parts of Ayar’s design into two chiplets for specific applications.

Both options remain on the table, “and we’re getting more of those kinds of requests coming in,” he said, suggesting the customer might not need the 2 Tbps bandwidth that Ayar’s current chiplets offer. For example, a sensor application may need to move to ultra-low-power optical data links, perhaps preferring to drop to several hundred Gbps to allow ultra-low power in a small footprint.

Next generation chiplets

Charlie Wuishpard (Source: Ayar Labs)

Ayar is still deciding what’s next on the product roadmap, but that could include regulatory levers such as the number of wavelengths used (currently eight), the bandwidth enabled by each wavelength (currently 32 Gbps), and the number of the macros (transmit- receive pairs, currently eight per eraPHY chiplet).

On the laser side, Ayar has plans to support multiple TeraPHY chiplets with a single laser source. This makes sense since the laser is an expensive part of the system. But there are trade-offs, Wuishpard said, including relying on just one source without redundancy.

“It’s a multivariate problem, there’s a lot going on,” he said. “We have to try to pick the best route among the choices, and part of that is getting the right feedback from customers.”

Far-future possibilities for Ayar’s technology roadmap include the potential for use in quantum computers, where heat lost from copper wires can cause problems. Another possibility could be to build quantum security capabilities into optical links.

“We have photons … there are things we can do with those photons when we have them under our control,” he said.

Although Wuischpard did not go too far into the details, one possibility could be the implementation of quantum key distribution (QKD) in short-haul optical links. With QKD, the quantum state of successive photons traversing the link acts as a quantum-resistant encryption key.

Building an ecosystem

When we talk about the inevitable shift from copper to optical interconnects between chips, the technology, while difficult, is only part of the puzzle. Commercializing this technology and building an ecosystem that allows it to thrive is critical. This ecosystem is a key strategic priority for Ayar. The company needs to make sure its chips can fit into all the appropriate packaging flows while also sorting out its customer base.

Ayar counts the venture capital divisions of key suppliers (Applied Materials and GlobalFoundries) and key customers (Nvidia, Intel, Hewlett Packard Enterprise and Lockheed Martin) in its group of strategic investors.

Does this represent critical mass or are more leads needed at this stage to create an ecosystem?

“Every single one of these companies has the volume to allow a company like ours to thrive,” Wuishpard said. “But our aspirations are bigger than that.”

Ayar wants to make an overarching standard that everyone can use to help accelerate the widespread adoption of chip-to-chip optical links.

“I don’t think there’s anyone close to us as an independent who could provide that, but [we’re] trying to understand how a small company creates a standard that can be used by everyone,” he said.

A standard would mean a reduced need for proprietary solutions, which Wuischpard believes could be Ayar’s main competitors today.

“One of the big companies might say, ‘This is too important, I’m just going to throw a lot of engineers at it and do it myself,'” he said. “But then you have to ask: Is this going to be just for their benefit, or is there going to be interoperability with the rest of the industry? This leads back to the industry wanting it to be more widely adopted so that it is truly an industry solution rather than a specific one customer solution.”

Enter the competition

Industry-wide adoption would mean more than just Ayar making the I/O chiplets.

Wuischpard draws a parallel with AMD’s licensing of Intel x86, noting that there may come a time when the company needs to make it easier for some competitors.

“In the long run, having another chiplet provider that is similar or equal probably wouldn’t be the worst thing if we could monetize it somehow,” he said. “Those talks are still ongoing.”

Wuischpard noted that Ayar has already established a multi-source agreement regarding the laser sources needed to power its optical links. Laser manufacturer Sivers Photonics already produces the Ayar Labs SuperNova 8-wave distributed-feedback laser array as part of this agreement.

Welcomes the UCIe standard

Ayar looks forward to the adoption of the Unified Chiplet Interconnect Express (UCIe) standard, which is designed to enable a chiplet ecosystem where heterogeneous chiplets can be mixed and matched. (UCIe includes the standard compute express link (CXL) for a memory-to-processor chiplet).

Today, Ayar uses a proprietary electrical interface between the processor and the optical chiplet, but the company plans to be UCIe compatible in the future.

“Our world seemed very complex – even as a chiplet, there are many different interfaces for different standards,” he said. “With UCIe and CXL, things really picked up. There are things that are patented…but people crash around those standards a lot more than some of the others that are out there.”

It’s entirely possible to create a custom version of the TeraPHY chiplet for client protocols such as NVLink or Infinity Fabric, Wuischpard said, but that would require a new outlet.

Manufacturing process

Ayar is shipping TeraPHY chiplets today and intends to ship “thousands of units” in 2023, ramping up volumes over the next few years.

“We have several opportunities with individual volumes in the range of about a million units, which would be fantastic, and there is pressure to do them sooner rather than later,” Wuischpard said. “The question is whether we can get everything in place fast enough to do this deployment sooner, just given the cycle time in semiconductors.”

As demand for semiconductors has rebounded since the pandemic, Ayar, like many companies without fab products, has seen delays in schedules due to foundry capacity. This delayed the qualification of Ayar’s production process for several quarters, finally achieving qualification in June. The next step is to work on yields and costs, Wuischpard said.

“There was a lot of work in securing all the volume contracts, establishing all the quality protocols and acceptance levels, simulating what the yields should be,” he said. “Also, and this is not obvious, but it applies to all chiplet manufacturers: you have to have a really good test environment.”

Ayar chiplets co-packaged with a processor or SoC die (Source: Ayar Labs)

Ayar has invested heavily in optical and electrical wafer testers to perform this high-speed testing. That part of the process will eventually be moved to an outsourced semiconductor assembly and test (OSAT) house, but it’s up to Ayar to establish the test patterns before that happens. Ayar provides clients with a known good matrix (KGD), which is especially important given that there can be multiple Ayar matrices packaged together with a client’s CPU.

“By the same token, we want to make sure our foundry is providing us with high-yield wafers,” Wuishpard said. “Everybody goes through it to some degree, but as a small supplier, I think you really have to prove yourself, and you do that in part through the rigor you have in your testing.”

How will everything go?

What is Wuischpard’s end game? An acquisition by a company like Intel or Nvidia would be an obvious potential outcome, but Wuischpard said that type of exit is not an explicit part of the plan.

“If you’re building a company to be bought, you’re not going to build the right kind of company,” he said. “One may come; I just want to make sure we don’t make that our goal at the very beginning.”

Wuischpard’s belief is that where there are major technological transitions, such as switching from copper wires to optical fibersnew independent companies can be created.

“If we’re even relatively close to our goals, I think there’s an opportunity to be a stand-alone, independent provider,” he said. “This would particularly appeal to our founders because it would mean the widest possible adoption of the technology they poured their life’s blood into.”


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