Siemens Multi-die software accelerates design-to-test tasks in 2.5D/3D-architected integrated circuits

The Tessent Multi-die software solution helps designers dramatically accelerate and simplify critical design-for-test (DFT) tasks for next-generation integrated circuits (ICs) based on 2.5D and 3D architectures.

As the demand for smaller, more energy-efficient and higher-performance integrated circuits continues to challenge the global integrated circuit design community, next-generation devices increasingly feature sophisticated 2.5D and

3D architectures that connect dies vertically (3D IC) or side by side (2.5D) so that they behave as a single device. However, these approaches can present significant challenges for IC test,
since most legacy approaches to IC testing are based on conventional two-dimensional processes.

To address these challenges, Siemens today introduces Tessent Multi-die software—the industry’s most comprehensive DFT automation solution for highly complex DFT tasks related to 2.5D and 3D IC designs. The new solution works seamlessly with Siemens’ Tessent TestKompress Streaming Scan Network software and Tessent IJTAG software, which optimize DFT test resources for each block without worrying about impacts on the rest of the design, thus streamlining the planning and implementation of DFT for 2.5D and 3D IC era.

Using Tessent Multi-die software, IC design teams can rapidly generate IEEE 1838 compliant hardware including 2.5D and 3D IC architectures.

“IC design organizations are seeing dramatic spikes in IC test complexity due to the rapid adoption and deployment of designs involving densely packed dies in 2.5D and 3D devices,” said Ankur Gupta, vice president and general manager of the Tessent business unit for Siemens Digital Industrial software. “With Siemens’ new Tessent Multi-die solution, our customers can be ready for tomorrow’s designs while reducing test deployment efforts while optimizing production test costs today.”

In addition to supporting comprehensive 2.5D and 3D IC design test, the Tessent Multi-die solution can generate die-to-die interconnect patterns and enable package-level test using
Boundary Scan Description Language (BSDL). In addition, Tessent Multi-die supports flexible parallel port (FPP) technology integration by leveraging the packet data delivery capabilities of
Siemens’ Tessent TestKompress Streaming Scan Network software. Introduced two years ago, Tessent TestKompress Streaming Scan Network separates core-level DFT requirements from chip-level test delivery resources. This enables an uncompromised bottom-up DFT flow that can dramatically simplify DFT planning and implementation while reducing test time by up to 4x.

Siemens Digital Industries Software, 200 Fifth Avenue, 5th floor, Waltham, MA 02451, fax +1 781 250 6801, email info.plm@siemens.com, www.sw.siemens.com