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The manufacturing process of any semiconductor can be divided into five main phases: crystal growth, slicing and grinding, polishing, epitaxy (epi), and device fabrication. The third step, which we usually call “polishing”, is the final phase of substrate production. This step is particularly important for atomically smoothing the substrate surface, obtaining a high level of planarity, which is essential for subsequent processing of the wafer.

Although Chemical Mechanical Polishing (CMP) has been the most used technique for polishing substrates for some time, a newly introduced technology, Plasma Polish Dry Etch (PPDE), is emerging as a valid alternative offered by Oxford Instruments Plasma Technology, a business unit of Oxford Instruments Plc., which can overcome some of the limitations offered by CMP.

At the recent International Conference on Silicon Carbide and Related Materials (ICSCRM), held September 11-16, 2022., in Davos, Switzerland, Oxford Instruments launched its new plasma polishing process for SiC substrates. Billed as a direct replacement for conventional CMP technology, Plasma Polish aims to fit nicely into this demand gap where CMP currently sits.

Dry etching with plasma polishing

This article focuses on the PPDE technology developed by Oxford Instruments, a company founded in the late 1950s as a spin-off from the University of Oxford. Today, the company provides high-tech products and services to many of the world’s leading companies and research communities.

“I would say almost 50% of our business at Plasma Technology is focused on corporate R&D and universities,” said Brian Dlugosz, vice president of strategic manufacturing markets at Oxford Instruments Plasma Technology. “However, the remaining 50% of our business is based on serving manufacturing customers, but it is moving significantly into manufacturing as our combined solutions gain traction in high-growth markets reliant on advanced materials.”

According to Dlugosz, silicon carbide is one of the products that Oxford Instruments is looking to get into its manufacturing customers because of the high market demand for this semiconductor and the resulting high-volume manufacturing process it requires.

According to market analysis, the supply forecast for 6-inch wafers in the automotive industry is growing with a clear demand gap, which is a real challenge for the entire electronics industry. The solution is currently 150mm, but the hardware is compatible with 200mm production. The company’s patented approach provides a smooth and damage-free SiC surface and subsurface. This achievement is essential to enable low defect density epitaxial growth.

“CMP has limitations that could slow the adoption of SiC in devices used in e-mobility and sustainable energy. Plasma Polish can overcome these limitations and scale to meet the needs of these fast-growing markets,” said Dlugosz.

The plasma polishing technique is scalable, providing the same results for SiC substrates regardless of wafer size. This enables the application of industry standard wafer handling, monitoring and control techniques that reduce contact time while increasing yield and efficiency.

Besides the lack of scalability, CMP suffers from some limitations, including high environmental costs and ultimately high operating costs, including fertilizer byproducts that are expensive to purchase, expensive to dispose of, and require extreme water use. Almost 40% of water consumption in a semiconductor manufacturing plant is related to CMP. Additionally, the physical pressure that CMP applies to the wafer means that breakage problems can occur.

“The first benefit of our plasma polishing process is cost reduction,” said Dlugosz. “Compared to CMP, Plasma Polish’s cost per wafer is lower, there is less use of chemicals and consumables, and process stability is greatly improved.”

Chemical-mechanical processes exert stress on the substrate, which increases plate loss and breakage. As the particles abrade the SiC, scratches are left on the surface. Plasma Polish is a non-contact method for selectively removing damaged SiC from a surface while maintaining good surface quality.

Other advantages of PPDE are lower cost per wafer, less use of chemicals and consumables, and better process stability and MTBC.

One critical aspect to understanding what is happening on and below the surface of the wafer is that smoother is not necessarily better. CMP planarizes the SiC surface very well and leaves a flat topography, but it is not always effective to target subsurface damage. Conversely, Plasma Polish selectively targets defective and damaged material that is weakly bonded and more easily etched. This last aspect is highlighted in the diagrams in Figure 1. What remains is not necessarily smoother, but a higher quality crystal.

Figure 1: Comparison between the final crystal quality of CMP and Plasma Polish

Process validation

Oxford Instruments has validated its 2-step plasma polishing process. The first consisted of validating the epi-layer properties by KOH etching, Candela and epi-surface roughness. The second step involved validating plasma-polished substrates by creating devices in collaboration with its partner, Clas-SiC Wafer Fab. Working at its foundry in Scotland, Clas-SiC received both CMP and PPDE prepared wafers and evaluated the quality of the wafers by running them through the same diode and MOSFET line. Whole wafers of 1200-V SiC MOSFET devices were qualified, providing parametric results and yield comparable to, or perhaps even slightly better, yield-wise than CMP-prepared wafers.

Ultimately, the evaluation performed by Clas-SiC showed that epi grown on PPDE substrates had the same properties as that grown on CMP substrates, and MOSFET devices showed comparable performance. Oxford Instruments shared at the recent ICSCRM full wafer performance data obtained from Clas-SiC.

“We believe our solution offers significant advantages to CMP, such as an environmentally friendly solution with lower cost and potentially higher yields,” said Dlugosz.

SiC substrates are currently in short supply due to high demand, and wideband semiconductors that are fabricated on substrates are also in demand. New solutions are needed as this manufacturing gap is expected to grow exponentially as the fast-growing electric vehicle and sustainable energy markets use more and more of these compound semiconductors in their applications. Plasma polishing, according to Oxford Instruments, is a plug-and-play replacement for CMP that immediately lowers the cost per wafer with reduced operating costs, but is also a key enabling technology to accelerate the transition to 200mm.

“We have validated and launched a cleaner, greener and cheaper alternative to CMP that has the potential to overcome the technological limitations of CMP and accelerate the adoption of SiC in some really exciting applications,” said Dlugosz.

For every car on the road to be electric, longer-range EVs not only need to be the norm, but batteries need to be more affordable and faster to charge. As silicon reaches its theoretical limits, the industry is shifting to SiC for power electronics because of its wider bandgap, higher electric breakdown field, and higher thermal conductivity. SiC-based MOSFETs do achieve lower losses, higher switching frequencies, and higher power densities than silicon components.